SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype

Chad D. Kersey, Sudhakar Yalamanchili, Hyesoon Kim. SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype. In Bruce Jacob, editor, Proceedings of the 2015 International Symposium on Memory Systems, MEMSYS 2015, Washington DC, DC, USA, October 5-8, 2015. pages 29-30, ACM, 2015. [doi]

Abstract

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