SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype

Chad D. Kersey, Sudhakar Yalamanchili, Hyesoon Kim. SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype. In Bruce Jacob, editor, Proceedings of the 2015 International Symposium on Memory Systems, MEMSYS 2015, Washington DC, DC, USA, October 5-8, 2015. pages 29-30, ACM, 2015. [doi]

@inproceedings{KerseyYK15,
  title = {SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype},
  author = {Chad D. Kersey and Sudhakar Yalamanchili and Hyesoon Kim},
  year = {2015},
  doi = {10.1145/2818950.2818954},
  url = {http://doi.acm.org/10.1145/2818950.2818954},
  researchr = {https://researchr.org/publication/KerseyYK15},
  cites = {0},
  citedby = {0},
  pages = {29-30},
  booktitle = {Proceedings of the 2015 International Symposium on Memory Systems, MEMSYS 2015, Washington DC, DC, USA, October 5-8, 2015},
  editor = {Bruce Jacob},
  publisher = {ACM},
  isbn = {978-1-4503-3604-8},
}