Young-Ju Kim 0001, Hye-Jung Kwon, Su-Yeon Doo, Min-Su Ahn, Yong Hun Kim, Yong Jae Lee, Dong-Seok Kang, Sung-Geun Do, Chang-Yong Lee, Gun-hee Cho, Jae-Koo Park, Jae-Sung Kim, Kyung Bae Park, Seung-Hoon Oh, Sang-Yong Lee, Ji-Hak Yu, Ki-Hun Yu, Chul-Hee Jeon, Sang-Sun Kim, Hyun Soo Park, Jeong-Woo Lee, Seung Hyun Cho, Keon-Woo Park, Yong-Jun Kim, Young Hun Seo, Chang-Ho Shin, Chanyong Lee, Sam-Young Bang, Youn-Sik Park, Seouk-Kyu Choi, Byung-Cheol Kim, Gong-Heum Han, Seung-Jun Bae, Hyuk-jun Kwon, Jung Hwan Choi, Young-Soo Sohn, Kwang-Il Park, Seong-Jin Jang, Gyo-Young Jin. A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking. J. Solid-State Circuits, 54(1):197-209, 2019. [doi]
@article{KimKDAKLKDLCPKP19,
title = {A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking},
author = {Young-Ju Kim 0001 and Hye-Jung Kwon and Su-Yeon Doo and Min-Su Ahn and Yong Hun Kim and Yong Jae Lee and Dong-Seok Kang and Sung-Geun Do and Chang-Yong Lee and Gun-hee Cho and Jae-Koo Park and Jae-Sung Kim and Kyung Bae Park and Seung-Hoon Oh and Sang-Yong Lee and Ji-Hak Yu and Ki-Hun Yu and Chul-Hee Jeon and Sang-Sun Kim and Hyun Soo Park and Jeong-Woo Lee and Seung Hyun Cho and Keon-Woo Park and Yong-Jun Kim and Young Hun Seo and Chang-Ho Shin and Chanyong Lee and Sam-Young Bang and Youn-Sik Park and Seouk-Kyu Choi and Byung-Cheol Kim and Gong-Heum Han and Seung-Jun Bae and Hyuk-jun Kwon and Jung Hwan Choi and Young-Soo Sohn and Kwang-Il Park and Seong-Jin Jang and Gyo-Young Jin},
year = {2019},
doi = {10.1109/JSSC.2018.2883395},
url = {https://doi.org/10.1109/JSSC.2018.2883395},
researchr = {https://researchr.org/publication/KimKDAKLKDLCPKP19},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {54},
number = {1},
pages = {197-209},
}