A forward body-biased low-leakage SRAM cache: device, circuit and architecture considerations

Chris H. Kim, Jae-Joon Kim, Saibal Mukhopadhyay, Kaushik Roy. A forward body-biased low-leakage SRAM cache: device, circuit and architecture considerations. IEEE Trans. VLSI Syst., 13(3):349-357, 2005. [doi]

Abstract

Abstract is missing.