Residue cache: a low-energy low-area L2 cache architecture via compression and partial hits

Soontae Kim, Jongmin Lee 0002, Jesung Kim, Seokin Hong. Residue cache: a low-energy low-area L2 cache architecture via compression and partial hits. In Carlo Galuzzi, Luigi Carro, Andreas Moshovos, Milos Prvulovic, editors, 44rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2011, 3-7 December 2011, Porto Alegre, Brazil. pages 420-429, ACM, 2011. [doi]

Abstract

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