Design of a novel 3.3 V CMOS logarithmic amplifier with a two step linear limiting architecture

SooYeon Kim, Minkyu Song. Design of a novel 3.3 V CMOS logarithmic amplifier with a two step linear limiting architecture. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 131-134, IEEE, 2002. [doi]

Abstract

Abstract is missing.