Proposal of Scalable Vector Extension for Embedded RISC-V Soft-Core Processor

Yoshiki Kimura, Tomoya Kikuchi, Kanemitsu Ootsu, Takashi Yokota. Proposal of Scalable Vector Extension for Embedded RISC-V Soft-Core Processor. In Seventh International Symposium on Computing and Networking Workshops, CANDAR 2019 Workshops, Nagasaki, Japan, November 26-29, 2019. pages 435-439, IEEE, 2019. [doi]

@inproceedings{KimuraKOY19,
  title = {Proposal of Scalable Vector Extension for Embedded RISC-V Soft-Core Processor},
  author = {Yoshiki Kimura and Tomoya Kikuchi and Kanemitsu Ootsu and Takashi Yokota},
  year = {2019},
  doi = {10.1109/CANDARW.2019.00082},
  url = {https://doi.org/10.1109/CANDARW.2019.00082},
  researchr = {https://researchr.org/publication/KimuraKOY19},
  cites = {0},
  citedby = {0},
  pages = {435-439},
  booktitle = {Seventh International Symposium on Computing and Networking Workshops, CANDAR 2019 Workshops, Nagasaki, Japan, November 26-29, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-5268-4},
}