Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction

Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa. Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction. In 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany. pages 646-647, IEEE Computer Society, 2005. [doi]

Authors

Takeshi Kitahara

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Naoyuki Kawabe

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Fumihiro Minami

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Katsuhiro Seta

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Toshiyuki Furusawa

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