Dynamic Processor Throttling for Power Efficient Computations

Masaaki Kondo, Hiroshi Nakamura. Dynamic Processor Throttling for Power Efficient Computations. In Babak Falsafi, T. N. Vijaykumar, editors, Power-Aware Computer Systems, 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004, Revised Selected Papers. Volume 3471 of Lecture Notes in Computer Science, pages 120-134, Springer, 2004. [doi]

Abstract

Abstract is missing.