A Design-for-Test Solution Based on Dedicated Test Layers and Test Scheduling for Monolithic 3-D Integrated Circuits - researchr publication

researchr

You are not signed in
Sign in
Sign up

Abhishek Koneru, Sukeshwar Kannan, Krishnendu Chakrabarty. A Design-for-Test Solution Based on Dedicated Test Layers and Test Scheduling for Monolithic 3-D Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 38(10):1942-1955, 2019. [doi]

Abstract is missing.

runs on WebDSL