Narasimha Rao Konijeti, J. V. R. Ravindra, Pandurangaiah Yagateela. Power Aware and Delay Efficient Hybrid CMOS Full-Adder for Ultra Deep Submicron Technology. In David Al-Dabass, Alessandra Orsoni, Zheng Xie, editors, Seventh UKSim/AMSS European Modelling Symposium, EMS 2013, 20-22 November, 2013, Manchester UK. pages 697-700, IEEE, 2013. [doi]
Abstract is missing.