Ioannis Kouretas, Vassilis Paliouras. Residue Arithmetic for Variation-Tolerant Design of Multiply-Add Units. In José C. Monteiro, Rene van Leuken, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers. Volume 5953 of Lecture Notes in Computer Science, pages 26-35, Springer, 2009. [doi]
Abstract is missing.