Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs

Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim. Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. IEEE Trans. on CAD of Integrated Circuits and Systems, 39(6):1151-1164, 2020. [doi]

Abstract

Abstract is missing.