Transistor-Level Timing Analysis Using Embedded Simulation

Pawan Kulshreshtha, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Hakan Yalcin. Transistor-Level Timing Analysis Using Embedded Simulation. In Ellen Sentovich, editor, Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000, San Jose, California, USA, November 5-9, 2000. pages 344-348, IEEE, 2000.

Abstract

Abstract is missing.