Design space exploration and power optimization of STT MRAM using trimmed fin Asymmetric FinFET

Ashok Kumar, Jagadish Rajpoot, Shivam Verma. Design space exploration and power optimization of STT MRAM using trimmed fin Asymmetric FinFET. Microelectronics Journal, 149:106238, 2024. [doi]

Abstract

Abstract is missing.