A high performance ST-Box based unified AES encryption/decryption architecture on FPGA

Dur-e-Shahwar Kundi, Arshad Aziz, Nassar Ikram. A high performance ST-Box based unified AES encryption/decryption architecture on FPGA. Microprocessors and Microsystems, 41:37-46, 2016. [doi]

@article{KundiAI16,
  title = {A high performance ST-Box based unified AES encryption/decryption architecture on FPGA},
  author = {Dur-e-Shahwar Kundi and Arshad Aziz and Nassar Ikram},
  year = {2016},
  doi = {10.1016/j.micpro.2015.11.015},
  url = {http://dx.doi.org/10.1016/j.micpro.2015.11.015},
  researchr = {https://researchr.org/publication/KundiAI16},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {41},
  pages = {37-46},
}