Verification work reduction methodology in low-power chip implementation

Masanori Kurimoto, Takeshi Yamamoto, Satoshi Nakano, Atsuto Hanami, Hiroyuki Kondo. Verification work reduction methodology in low-power chip implementation. ACM Trans. Design Autom. Electr. Syst., 18(1):12, 2012. [doi]

Abstract

Abstract is missing.