A 16-ns 1-Mb CMOS EPROM - researchr publication related

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Masao Kuriyama, Shigeru Atsumi, Ken-ichi Imamiya, Yumiko Iyama, Naohiro Matsukawa, Hitoshi Araki, Kazuhito Narita, Kazunori Masuda, Sumio Tanaka. A 16-ns 1-Mb CMOS EPROM. J. Solid-State Circuits, 25(5):1141-1146, October 1990. [doi]

The following publications are possibly variants of this publication:

A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAMHiroalu Nambu, Kazuo Kanetani, Youji Idei, Tom Masuda, Keiichi Higeta, Masayuki Ohayashi, Masami Usami, Kunihiko Yamaguchi, Toshiyuki Kikuchi, Takahide Ikeda, Kenichi Ohhata, Takeshi Kusunoki, Noriyuki Homma. jssc, 30(4):491-499, April 1995. [doi]

A 62-ns 16-Mb CMOS EPROM with voltage stress relaxation techniqueNaoto Tomita, Nobuaki Ohtsuka, Jun-ichi Miyamoto, Ken-ichi Imamiya, Yumiko Iyama, Seiichi Mori, Yoichi Ohshima, Norihisa Arai, Yukio Kaneko, Eiji Sakagami, Kuniyoshi Yoshikawa, Sumio Tanaka. jssc, 26(11):1593-1599, November 1991. [doi]

A 68-ns 4-Mbit CMOS EPROM with high-noise-immunity designKenichi Imamiya, Jun-ichi Miyamoto, Shigeru Atsumi, Nobuaki Ohtsuka, Yukinori Muroya, Toshiyuki Sako, Masao Higashino, Yumiko Iyama, Seiichi Mori, Yoichi Ohshima, Hitoshi Araki, Yukio Kaneko, Kazuhito Narita, Norihisa Arai, Kuniyoshi Yoshikawa, Shinichi Tanaka. jssc, 25(1):72-78, February 1990. [doi]

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