Yonghwi Kwon, Inhak Han, Youngsoo Shin. Clock Gating Synthesis of Netlist with Cyclic Logic Paths. In David Z. Pan, editor, Proceedings of the International Conference on Computer-Aided Design, ICCAD 2019, Westminster, CO, USA, November 4-7, 2019. pages 1-6, ACM, 2019. [doi]
Abstract is missing.