On-Chip Memory Optimization of High Efficiency Accelerator for Deep Convolutional Neural Networks - researchr publication

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Tzu-Yi Lai, Kuan-Hung Chen. On-Chip Memory Optimization of High Efficiency Accelerator for Deep Convolutional Neural Networks. In International SoC Design Conference, ISOCC 2018, Daegu, South Korea, November 12-15, 2018. pages 82-83, IEEE, 2018. [doi]

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