A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs

Parag K. Lala, Anup Singh, Alvernon Walker. A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs. In 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings. pages 238-246, IEEE Computer Society, 1999. [doi]

Authors

Parag K. Lala

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Anup Singh

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Alvernon Walker

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