Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA

Christophe Layer, Daniel Schaupp, Hans-Jörg Pfleiderer. Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 405-408, IEEE, 2007. [doi]

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