A Dual-Path Logarithmic Number System Addition/Subtraction Scheme for FPGA

Barry Lee, Neil Burgess. A Dual-Path Logarithmic Number System Addition/Subtraction Scheme for FPGA. In Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa, editors, Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings. Volume 2778 of Lecture Notes in Computer Science, pages 808-817, Springer, 2003. [doi]

Abstract

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