On-Chip Bus Modeling for Power and Performance Estimation

Je-Hoon Lee, Young-Sin Cho, Seok-Man Kim, Kyoung-Rok Cho. On-Chip Bus Modeling for Power and Performance Estimation. In Stamatis Vassiliadis, Mladen Berekovic, Timo D. Hämäläinen, editors, Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings. Volume 4599 of Lecture Notes in Computer Science, pages 200-210, Springer, 2007. [doi]

Abstract

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