Kiyeon Lee, Moo-Kyoung Chung, Soojung Ryu, Yeon Gon Cho, Sangyeun Cho. Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors. In 30th International IEEE Conference on Computer Design, ICCD 2012, Montreal, QC, Canada, September 30 - Oct. 3, 2012. pages 500-501, IEEE Computer Society, 2012. [doi]
Abstract is missing.