A Circuit Level Fault Model for Resistive Opens and Bridges

Zhuo Li, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. H. Walker. A Circuit Level Fault Model for Resistive Opens and Bridges. In 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA. pages 379-384, IEEE Computer Society, 2003. [doi]

Abstract

Abstract is missing.