On-chip measurement of data jitter with sub-picosecond accuracy for 10Gb/s multilane CDRs

Joshua Liang, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura. On-chip measurement of data jitter with sub-picosecond accuracy for 10Gb/s multilane CDRs. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]

Abstract

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