A Scalable VLSI Architecture for Binary Prefix Sums

Rong Lin, Koji Nakano, Stephan Olariu, Maria Cristina Pinotti, James L. Schwing, Albert Y. Zomaya. A Scalable VLSI Architecture for Binary Prefix Sums. In 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP 98), March 30 - April 3, 1998, Orlando, Florida, USA, Proceedings. pages 333-337, IEEE Computer Society, 1998. [doi]

Abstract

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