A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC

Zhiting Lin, Runru Yu, Da Huo, Qingchuan Zhu, Miao Long, Yongqi Qin, Yanchun Liu, Lintao Chen, Simin Wang, Ting Wang, Yousheng Xing, Zeshi Wen, Yu Liu, Xin Li, Chenghu Dai, Qiang Zhao, Chunyu Peng, Xiulong Wu. A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC. Microelectronics Journal, 153:106397, 2024. [doi]

@article{LinYHZLQLCWWXWLLDZPW24,
  title = {A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC},
  author = {Zhiting Lin and Runru Yu and Da Huo and Qingchuan Zhu and Miao Long and Yongqi Qin and Yanchun Liu and Lintao Chen and Simin Wang and Ting Wang and Yousheng Xing and Zeshi Wen and Yu Liu and Xin Li and Chenghu Dai and Qiang Zhao and Chunyu Peng and Xiulong Wu},
  year = {2024},
  doi = {10.1016/j.mejo.2024.106397},
  url = {https://doi.org/10.1016/j.mejo.2024.106397},
  researchr = {https://researchr.org/publication/LinYHZLQLCWWXWLLDZPW24},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {153},
  pages = {106397},
}