A buffer cache architecture for smartphones with hybrid DRAM/PCM memory

Ye-Jyun Lin, Chia-Lin Yang, Hsiang-Pang Li, Cheng-Yuan Michael Wang. A buffer cache architecture for smartphones with hybrid DRAM/PCM memory. In IEEE Non-Volatile Memory System and Applications Symposium, NVMSA 2015, Hong Kong, China, August 19-21, 2015. pages 1-6, IEEE, 2015. [doi]

Abstract

Abstract is missing.