Introducing the modeling and verification process in SysML

Marcos Vinicius Linhares, Rômulo Silva de Oliveira, Jean-Marie Farines, François Vernadat. Introducing the modeling and verification process in SysML. In Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2007, September 25-28, 2007, Patras, Greece. pages 344-351, IEEE, 2007. [doi]

Abstract

Abstract is missing.