Power-Aware Test Scheduling in Network-on-Chip Using Variable-Rate On-Chip Clocking

Chunsheng Liu, Vikram Iyengar, Jiangfan Shi, √Črika F. Cota. Power-Aware Test Scheduling in Network-on-Chip Using Variable-Rate On-Chip Clocking. In 23rd IEEE VLSI Test Symposium (VTS 2005), 1-5 May 2005, Palm Springs, CA, USA. pages 349-354, IEEE Computer Society, 2005. [doi]

Abstract

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