Single fault masking logic designs with error correcting codes

Jien-Chung Lo. Single fault masking logic designs with error correcting codes. In 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 1995, Lafayette, LA, USA, November 13-15, 1995. pages 296, IEEE Computer Society, 1995. [doi]

Abstract

Abstract is missing.