A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design

Yingchun Lu, Guangzhen Hu, Jianan Wang, Hao Wang, Liang Yao, Huaguo Liang, Maoxiang Yi, Zhengfeng Huang. A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design. J. Electronic Testing, 38(1):63-76, 2022. [doi]

Abstract

Abstract is missing.