Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints - researchr publication authors

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Daniele Ludovici, Francisco Gilabert VillamÃ³n, Simone Medardoni, CrispÃn GÃ³mez Requena, MarÃa Engracia GÃ³mez, Pedro LÃ³pez, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi. Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints. In Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009. pages 562-565, IEEE, 2009. [doi]

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