Zuying Luo. General transistor-level methodology on VLSI low-power design. In Gang Qu, Yehea I. Ismail, Narayanan Vijaykrishnan, Hai Zhou, editors, Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006. pages 115-118, ACM, 2006. [doi]
Abstract is missing.