VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling

Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Ye, Wei Mark Fang, Jonathan Rose. VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling. In Paul Chow, Peter Y. K. Cheung, editors, Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009. pages 133-142, ACM, 2009. [doi]

@inproceedings{LuuKJCYFR09,
  title = {VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling},
  author = {Jason Luu and Ian Kuon and Peter Jamieson and Ted Campbell and Andy Ye and Wei Mark Fang and Jonathan Rose},
  year = {2009},
  doi = {10.1145/1508128.1508150},
  url = {http://doi.acm.org/10.1145/1508128.1508150},
  tags = {architecture, routing},
  researchr = {https://researchr.org/publication/LuuKJCYFR09},
  cites = {0},
  citedby = {0},
  pages = {133-142},
  booktitle = {Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009},
  editor = {Paul Chow and Peter Y. K. Cheung},
  publisher = {ACM},
  isbn = {978-1-60558-410-2},
}