A 0.1-1.5G SDR transmitter with two-stage harmonic rejection power mixer in 65-nm CMOS

Bing Lyu, Yun Yin, Xiaobao Yu, Baoyong Chi. A 0.1-1.5G SDR transmitter with two-stage harmonic rejection power mixer in 65-nm CMOS. In 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015. pages 1-4, IEEE, 2015. [doi]

Abstract

Abstract is missing.