A Speed-Optimized Systolic Array Processor Architecture for Spatio-Temporal 2-D IIR Broadband Beam Filters

Arjuna Madanayake, Leonard T. Bruton. A Speed-Optimized Systolic Array Processor Architecture for Spatio-Temporal 2-D IIR Broadband Beam Filters. IEEE Trans. on Circuits and Systems, 55-I(7):1953-1966, 2008. [doi]

Abstract

Abstract is missing.