A 16-Bit Microprocessor with Multi-Register Bank Architecture

Hideo Maejima, Hiroyuki Kida, Tan Watanabe, Shiro Baba, Keiichi Kurakazu. A 16-Bit Microprocessor with Multi-Register Bank Architecture. In Proceedings of the Fall Joint Computer Conference, November 2-6, 1986, Dallas, Texas, USA. pages 1014-1018, IEEE Computer Society, 1986.

Abstract

Abstract is missing.