A VLSI array architecture for realization of DFT, DHT, DCT and DST

Koushik Maharatna, A. S. Dhar, Swapna Banerjee. A VLSI array architecture for realization of DFT, DHT, DCT and DST. Signal Processing, 81(9):1813-1822, 2001. [doi]

Abstract

Abstract is missing.