A high performance vertical Si nanowire CMOS for ultra high density circuits

Satish Maheshwaram, Gaurav Kaushal, S. K. Manhas. A high performance vertical Si nanowire CMOS for ultra high density circuits. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2010, Kuala Lumpur, Malaysia, December 6-9, 2010. pages 1219-1222, IEEE, 2010. [doi]

Abstract

Abstract is missing.