FPGA PUF using programmable delay lines

Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas. FPGA PUF using programmable delay lines. In 2010 IEEE International Workshop on Information Forensics and Security, WIFS 2010, Seattle, WA, USA, December 12-15, 2010. pages 1-6, IEEE, 2010. [doi]

@inproceedings{MajzoobiKD10,
  title = {FPGA PUF using programmable delay lines},
  author = {Mehrdad Majzoobi and Farinaz Koushanfar and Srinivas Devadas},
  year = {2010},
  doi = {10.1109/WIFS.2010.5711471},
  url = {http://dx.doi.org/10.1109/WIFS.2010.5711471},
  researchr = {https://researchr.org/publication/MajzoobiKD10},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {2010 IEEE International Workshop on Information Forensics and Security, WIFS 2010, Seattle, WA, USA, December 12-15, 2010},
  publisher = {IEEE},
  isbn = {978-1-4244-9078-3},
}