Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment - researchr publication

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Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou. Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment. IEEE Trans. on CAD of Integrated Circuits and Systems, 26(3):447-455, 2007. [doi]

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