Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells

Theodore W. Manikas, Dale Teeters. Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells. In 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-23 May 2008, Dallas, Texas, USA. pages 197-201, IEEE Computer Society, 2008. [doi]

Abstract

Abstract is missing.