Mohammad M. Mansour, Naresh R. Shanbhag. Low-power VLSI decoder architectures for LDPC codes. In Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet, editors, Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002. pages 284-289, ACM, 2002. [doi]
Abstract is missing.