A structured and scalable test access architecture for TSV-based 3D stacked ICs

Erik Jan Marinissen, Jouke Verbree, Mario H. Konijnenburg. A structured and scalable test access architecture for TSV-based 3D stacked ICs. In 28th IEEE VLSI Test Symposium, VTS 2010, April 19-22, 2010, Santa Cruz, California, USA. pages 269-274, IEEE Computer Society, 2010. [doi]

@inproceedings{MarinissenVK10,
  title = {A structured and scalable test access architecture for TSV-based 3D stacked ICs},
  author = {Erik Jan Marinissen and Jouke Verbree and Mario H. Konijnenburg},
  year = {2010},
  doi = {10.1109/VTS.2010.5469556},
  url = {http://dx.doi.org/10.1109/VTS.2010.5469556},
  tags = {rule-based, architecture, testing},
  researchr = {https://researchr.org/publication/MarinissenVK10},
  cites = {0},
  citedby = {0},
  pages = {269-274},
  booktitle = {28th IEEE VLSI Test Symposium, VTS 2010, April 19-22, 2010, Santa Cruz, California, USA},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4244-6648-1},
}