Automatic synthesis of an 8-bit CPU with 100% on-line error detection capability

Tassos Markas, E. Edwards, S. Wang, J. Medero, Nick Kanopoulos. Automatic synthesis of an 8-bit CPU with 100% on-line error detection capability. In Proceedings of Third International Conference on Electronics, Circuits, and Systems, ICECS 1996, Rodos, Greece, October 13-16, 1996. pages 968-971, IEEE, 1996. [doi]

Abstract

Abstract is missing.