Memory Architecture for Parallel Line Drawing Based on Non Incremental Algorithm

Pere Marès Martí, Antonio B. Martínez Velasco. Memory Architecture for Parallel Line Drawing Based on Non Incremental Algorithm. In 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future, 5-7 September 2000, Maastricht, The Netherlands. pages 1266-1273, IEEE Computer Society, 2000. [doi]

Abstract

Abstract is missing.