Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip

Debora Matos, Gianluca Palermo, Vittorio Zaccaria, Cezar Reinbrecht, Altamiro Amadeu Susin, Cristina Silvano, Luigi Carro. Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip. In Maurizio Palesi, Shashi Kumar, editors, 4th International Workshop on Network on Chip Architectures, NoCArc '11, Porto Alegre, Brazil, December 4-5, 2011. pages 31-36, ACM, 2011. [doi]

@inproceedings{MatosPZRSSC11,
  title = {Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip},
  author = {Debora Matos and Gianluca Palermo and Vittorio Zaccaria and Cezar Reinbrecht and Altamiro Amadeu Susin and Cristina Silvano and Luigi Carro},
  year = {2011},
  doi = {10.1145/2076501.2076508},
  url = {http://doi.acm.org/10.1145/2076501.2076508},
  researchr = {https://researchr.org/publication/MatosPZRSSC11},
  cites = {0},
  citedby = {0},
  pages = {31-36},
  booktitle = {4th International Workshop on Network on Chip Architectures, NoCArc '11, Porto Alegre, Brazil, December 4-5, 2011},
  editor = {Maurizio Palesi and Shashi Kumar},
  publisher = {ACM},
  isbn = {978-1-4503-0947-9},
}